1. Field of the Invention
The present invention is related to a method of forming a fin structure of a non-planar transistor, and more particularly, to a method of forming at least a fin structure having nearly identical critical dimension (CD).
2. Description of the Prior Art
In recent years, as various kinds of consumer electronic products are being constantly modified towards increased miniaturization, the size of semiconductor components are modified to be reduced accordingly, in order to meet high integration, high performance, low power consumption, and the demands of products.
However, with the increasing miniaturization of electronic products, current planar FETs no longer meet the requirements of the products. Thus, non-planar FETs such as Fin-shaped FETs (Fin-FET) have been developed, which includes a three-dimensional channel structure. The manufacturing processes of Fin-FET devices can be integrated into traditional logic device processes, and thus are more compatible. In addition, since the three-dimensional structure of the Fin-FET increases the overlapping area between the gate and the substrate, the channel region is controlled more effectively. This therefore reduces drain-induced barrier lowering (DIBL) effect and short channel effect. Moreover, the channel region is longer for the same gate length. Therefore, the current between the source and the drain is increased. In recent years, the development of the Fin-FETS is still aiming to be used in devices with smaller scales.
However, some issues, such as poor CD uniformity of the fin structures of Fin-FETs, are still problems that should be overcome.